Abstract

The rapid advancement in semiconductor technology has led to an increase in the number of designers creating intellectual property cores, introducing significant hardware security risks in integrated circuit (IC) design. Outsourcing to unreliable manufacturing facilities enables attackers to incorporate harmful logic, known as hardware Trojans (HT), into the original design, posing threats to mission-critical systems. This research proposes developing pre-silicon detection systems using compressive sensing and deep learning algorithms to identify and eliminate HTs before ICs are deployed in crucial applications. By analyzing transition probabilities and employing adaptive learning, the detection strategy aims to improve hardware security, ensuring the integrity and reliability of ICs in various sectors, including medical, military, and automotive industries. This optimizes the chance of detection metric in the first phase. Additionally, the power profiles are tracked and measured at different times in order to rule out the golden circuit for anomaly detection. Recovery-based technique is used at the output power profiles for examining the Trojan at shorter time periods in order to demonstrate the efficacy of the CS algorithm. Using a decoding technique, the compressed power signals are recovered, and the correlation coefficient is examined. In the pre-silicon validation stage, it is found that compressed input patterns and power profiles at shorter time stamps make it easier to distinguish between the presence of a danger module and a regular circuit, which lowers the computational cost of vector production.
This model can identify Trojans in complicated circuits and handle a variety of Trojan kinds during training. In the third phase, deep learning models are used in an effort to more effectively automate feature extraction and modeling procedures in the training phase. With a higher prediction rate and maximum detection accuracy for complicated circuits, this method efficiently extracts a compact collection of characteristics. In order to handle the high dimensional data set in deep architectures, the extracted feature sets are dimensionally enhanced in the pre-processing step by modifying the deep convolutional generative adversarial network model.